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C/C++ Source or Header  |  1996-04-21  |  9.7 KB  |  250 lines
  1. /*  SVGATextMode -- An SVGA textmode manipulation/enhancement tool
  2.  *
  3.  *  Copyright (C) 1995,1996  Koen Gadeyne
  4.  *
  5.  *  This program is free software; you can redistribute it and/or modify
  6.  *  it under the terms of the GNU General Public License as published by
  7.  *  the Free Software Foundation; either version 2 of the License, or
  8.  *  (at your option) any later version.
  9.  *
  10.  *  This program is distributed in the hope that it will be useful,
  11.  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  12.  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13.  *  GNU General Public License for more details.
  14.  *
  15.  *  You should have received a copy of the GNU General Public License
  16.  *  along with this program; if not, write to the Free Software
  17.  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18.  */
  19.  
  20. /***
  21.  *** SVGA clockchip programming functions for SVGATextMode
  22.  ***/
  23.  
  24. #include <stdio.h>
  25. #include <unistd.h>
  26. #ifndef DOS
  27. #  include <asm/io.h>
  28. #endif
  29. #include "misc.h"
  30. #include "vga_prg.h"
  31. #include "std_clock.h"
  32. #include "chipset.h"
  33. #include "clockchip.h"
  34. #include "messages.h"  
  35. #include "XFREE/common_hw/IBMRGB.h"
  36.  
  37. #define VGACLK0  25175
  38. #define VGACLK1  28300
  39. #define CKDEV       75
  40.  
  41. #define STDVGA25(f)  (((freq) > (VGACLK0-CKDEV)) && ((freq) < (VGACLK0+CKDEV)))
  42. #define STDVGA28(f)  (((freq) > (VGACLK1-CKDEV)) && ((freq) < (VGACLK1+CKDEV)))
  43.  
  44. Bool prefer_vgaclocks(long freq, void clockselfunc())
  45. {
  46.   if STDVGA25(freq)
  47.   { 
  48.     clockselfunc(0);
  49.     PDEBUG(("Clockcip: choosing standard VGA clock 25.175 instead of programmable clock.\n"));
  50.     return(TRUE);
  51.   }
  52.   if ( (!OFLG_ISSET(OPT_CLKCHIP_X)) && (STDVGA28(freq)) )
  53.   {
  54.     clockselfunc(1);
  55.     PDEBUG(("Clockcip: choosing standard VGA clock 28.3 instead of programmable clock.\n"));
  56.     return(TRUE);
  57.   }
  58.   return(FALSE);
  59. }
  60.  
  61. void set_clockchip_clock(int chipset, long freq)
  62. {
  63.   bool result=TRUE;
  64.   int clk = 2;
  65.   
  66.   PDEBUG(("Setting clock for chipset #%d through clock chip #%d. Freq = %ld kHz.\n",\
  67.            chipset, clock_data.clockchiptype, freq));
  68.            
  69.   switch (chipset)
  70.   {
  71.     case CS_S3:
  72.      /* prefer standard VGA clocks over programmable clocks,
  73.       * but don't do this when using the ICD clockchip and programming clock #1
  74.       */
  75.       if (prefer_vgaclocks(freq, s3ClockSelect)) break;
  76.       switch(clock_data.clockchiptype)
  77.       {
  78.          case CLKCHIP_ICS9161A:
  79.          case CLKCHIP_DCS2834:
  80.          case CLKCHIP_ICD2061A:
  81.                                /* setting exactly 120 MHz doesn't work all the time */
  82.                                if (freq > 119900) freq = 119900;
  83.                                freq *= 1000;
  84.                                clk = (OFLG_ISSET(OPT_CLKCHIP_X)) ? 1 : 2; 
  85.                                AltICD2061SetClock(freq, clk);
  86.                                AltICD2061SetClock(freq, clk);
  87.                                AltICD2061SetClock(freq, clk);
  88.                                s3ClockSelect(OFLG_ISSET(OPT_SPEA_MERCURY) ? (4+clk) : clk); /* select the clock */
  89.                                break;
  90.         case CLKCHIP_SC11412:
  91.                                result = SC11412SetClock(freq);
  92.                                s3ClockSelect(OFLG_ISSET(OPT_SPEA_MERCURY) ? 6 : 2); /* select the clock */
  93.                                break;
  94.         case CLKCHIP_ICS2595:
  95.                                result = ICS2595SetClock(freq);
  96.                                result = ICS2595SetClock(freq);
  97.                                break;
  98.         case CLKCHIP_ICS5300:
  99.         case CLKCHIP_S3_SDAC:
  100.         case CLKCHIP_S3GENDAC:
  101.                                (void) S3gendacSetClock(freq, 2); /* can't fail */
  102.                                s3ClockSelect(2); /* select the clock */
  103.                                break;
  104.         case CLKCHIP_S3TRIO:  
  105.                                (void) S3TrioSetClock(freq, 2); /* can't fail */
  106.                                break;
  107.         case CLKCHIP_ICS5342:
  108.                                (void) ICS5342SetClock(freq, 2); /* can't fail */
  109.                                s3ClockSelect(2); /* select the clock */
  110.                                break;
  111.         case CLKCHIP_TI3025:
  112.                                /* xfree_Ti3025_init(); PDEBUG(("TI3025 Init done\n")); */
  113.                                Ti3025SetClock(freq, 2, s3ProgramTi3025Clock);
  114.                                s3ClockSelect(2); /* select the clock */
  115.                                break;
  116.         case CLKCHIP_TI3026:
  117.                                (void) Ti3026SetClock(freq, 2, 1); /* can't fail */
  118.                                s3ClockSelect(2); /* select the clock */
  119.                                break;
  120.         case CLKCHIP_CH8391:
  121.                                (void) Chrontel8391SetClock(freq, 2); /* can't fail */
  122.                                s3ClockSelect(2); /* select the clock */
  123.                                break;
  124.         case CLKCHIP_STG1703:
  125.                                (void) STG1703SetClock(freq, 2); /* can't fail */
  126.                                s3ClockSelect(2); /* select the clock */
  127.                                break;
  128.         case CLKCHIP_IBMRGB5XX:
  129.                                s3IBMRGB_Init();
  130.                                /* IBM RGB ref clock MUST be set correctly, or all will go wrong... */
  131.                                (void) IBMRGBSetClock(freq, 2, clock_data.maxclock, clock_data.refclk);
  132.                                s3OutIBMRGBIndReg(IBMRGB_pll_ctrl1, 0xf8, 1);  /* Unlock clock select registers */
  133.                                s3ClockSelect(2); /* select the clock */
  134.                                break;
  135.         default: PERROR(("Unknown clock chip #%d for S3 chipset.\n", clock_data.clockchiptype));
  136.       }
  137.       break;
  138.     case CS_ET4000:
  139.       if (prefer_vgaclocks(freq, ET4000ClockSelect)) break;
  140.       /* change ET4000 option flags so everything works fine */
  141.       OFLG_CLR(OPT_HIBIT_HIGH);
  142.       OFLG_SET(OPT_HIBIT_LOW);
  143.       OFLG_CLR(OPT_LEGEND);
  144.       OFLG_CLR(OPT_ET4000_ALTCLK);
  145.       PDEBUG(("Modified options mask (ET4000+ICS5341): 0x%x\n", STM_Options));
  146.       switch(clock_data.clockchiptype)
  147.       {
  148.         case CLKCHIP_ICS5341:
  149.                                (void) ET4000gendacSetClock(freq, 2); /* can't fail */
  150.                                /* select clock #2 */
  151.                                ET4000ClockSelect(2); /* make sure all Tseng-specific dividers are disabled */
  152.                                break;
  153.         case CLKCHIP_ICD2061A:
  154.                                /* setting exactly 120 MHz doesn't work all the time */
  155.                                if (freq > 119900) freq = 119900;
  156.                                freq *= 1000;
  157.                                clk = (OFLG_ISSET(OPT_CLKCHIP_X)) ? 1 : 2; 
  158.                                Et4000AltICD2061SetClock(freq, clk); 
  159.                                ET4000ClockSelect(clk); /* make sure all Tseng-specific dividers are disabled */
  160.                                break;
  161.         default: PERROR(("Unknown clock chip #%d for ET4000 chipset.\n", clock_data.clockchiptype));
  162.       }
  163.       break;
  164.       
  165.     case CS_CIRRUS:
  166.       switch(clock_data.clockchiptype)
  167.       {
  168.         case CLKCHIP_CIRRUS:
  169.                                CirrusClockSelect(freq);
  170.                                break;
  171.         default: PERROR(("Unknown clock chip #%d for Cirrus chipset.\n", clock_data.clockchiptype));
  172.       }
  173.       break;
  174.     case CS_ARK:
  175.       if (prefer_vgaclocks(freq, ARKClockSelect)) break;
  176.       switch(clock_data.clockchiptype)
  177.       {
  178.         case CLKCHIP_ICS5342:
  179.                                (void) ARKgendacSetClock(freq, 2); /* can't fail */
  180.                                /* select clock #2 */
  181.                                ARKClockSelect(2);
  182.                                break;
  183.         default: PERROR(("Unknown clock chip #%d for ARK chipset.\n", clock_data.clockchiptype));
  184.       }
  185.       break;
  186.     default: PERROR(("Internal error in set_clockchip_clock: chipset #%d does not support any clockchip.\n", chipset));
  187.   }
  188.   if (result == FALSE) PWARNING(("ClockChip: error while programming clock chip\n"));
  189.   usleep(50000);
  190. }
  191.  
  192. /*****************************************************************************************************************************/
  193.  
  194. void set_clockchip_Mclock(int chipset, long freq)
  195. {
  196.   bool result=TRUE;
  197.   
  198.   PDEBUG(("Setting MClk for chipset #%d through clock chip #%d. Freq = %ld kHz.\n",\
  199.            chipset, clock_data.clockchiptype, freq));
  200.   SYNCRESET_SEQ;
  201.  
  202.   switch(chipset)
  203.   {
  204.     case CS_S3:
  205.       switch(clock_data.clockchiptype)
  206.       {
  207.         case CLKCHIP_S3_SDAC:
  208.         case CLKCHIP_S3GENDAC:
  209.         case CLKCHIP_ICS5300:
  210.                  (void) S3gendacSetClock(freq, 10); /* can't fail */
  211.                  break;
  212.         case CLKCHIP_ICS5342:
  213.                  (void) ICS5342SetClock(freq, 10); /* can't fail */
  214.                  break;
  215.         default:
  216.                  ENDRESET_SEQ;
  217.                  PERROR(("MClk programming not supported for this S3 clockchip.\n"));
  218.       }
  219.       break;
  220.     case CS_ET4000:
  221.       switch(clock_data.clockchiptype)
  222.       {
  223.         case CLKCHIP_ICS5341:
  224.                  (void) ET4000gendacSetClock(freq, 10); /* can't fail */
  225.                  break;
  226.         default:
  227.                  ENDRESET_SEQ;
  228.                  PERROR(("MClk programming not supported for this ET4000 clockchip\n"));
  229.       }
  230.       break;
  231.     case CS_ARK:
  232.       switch(clock_data.clockchiptype)
  233.       {
  234.         case CLKCHIP_ICS5342:
  235.                  (void) ARKgendacSetClock(freq, 10); /* can't fail */
  236.                  break;
  237.         default:
  238.                  ENDRESET_SEQ;
  239.                  PERROR(("MClk programming not supported for this ARK clockchip\n"));
  240.       }
  241.       break;
  242.     default:
  243.              ENDRESET_SEQ;
  244.              PERROR(("MClk programming not supported on this chipset.\n"));
  245.   }
  246.   ENDRESET_SEQ;
  247.   if (result == FALSE) PWARNING(("ClockChip: error while programming clock chip\n"));
  248.   usleep(50000);
  249. }
  250.